Degree | Type | Year | Semester |
---|---|---|---|
2500895 Electronic Engineering for Telecommunication | OT | 4 | 0 |
Folowing knowledge is recommended:
C/C++ Programming
The overall objective of this course is threefold:
1. Technology of Complex HW/SW Embedded Systems
1.1 Embedded HW/SW Systems
1.2 From microcontrollers to SoCs (Systems-on-a-Chip)
1.3 Homogeneous and heterogeneous Multiprocessor Systems
1.4 Sensors and Microsystems
4. Embedded system design
4.1 Idea generation for the design of an embedded system and market study
4.2 Functional and performance specifications
4.3 Proposal for system architecture
4.4 Proposal for system implementation
4.5 Documentation
5. Seminars (optional)
6. Laboratory sessions
We plan 5 sessions for the analysis and programming of an embedded system on the Synergy plataform from Renesas.
Directed activities: lectures, seminars and laboratory sessions
Supervised Activities: embedded system design work (one per students groups of 2 or 3 people), tutoring, (optional) participation in an international challenge proposed by industries on embedded systems
Autonomous Activities: study of concepts and methodologies, preparation of design work and laboratory activities, writing reports and presentations
A visit to an industry related to the design and/or manufacture of embedded systems will be proposed (if possible).
Annotation: Within the schedule set by the centre or degree programme, 15 minutes of one class will be reserved for students to evaluate their lecturers and their courses or modules through questionnaires.
Title | Hours | ECTS | Learning Outcomes |
---|---|---|---|
Type: Directed | |||
Laboratory Sessions | 12 | 0.48 | 4, 3, 10 |
Lessons | 26 | 1.04 | 4, 3, 9, 10 |
Seminars on current trends | 12 | 0.48 | 2, 4, 3, 10, 12 |
Type: Supervised | |||
Tutoring | 12 | 0.48 | 4, 3, 9, 10 |
Type: Autonomous | |||
Preparation of Laboratory Sessions | 8 | 0.32 | 4, 3, 9, 10 |
Study | 68 | 2.72 | 2, 4, 3, 9, 10, 12 |
Evaluation of the Course is based on the following weighting:
The design work and laboratory work are compulsory in order to pass the course and have to be passed satisfactorily (mark above 5 over 10).
in case of a mark in the parcial control lower than 4 (over 10) the student must do the Final test to pass the course.
Any modification of this method of evaluation by circumstances not provided appropriate way will be communicated to the affected students.
Title | Weighting | Hours | ECTS | Learning Outcomes |
---|---|---|---|---|
Design (groupal) of an embedded system | 30% | 6 | 0.24 | 1, 2, 5, 4, 3, 7, 8, 9, 10, 12 |
Final Test | 35% | 2 | 0.08 | 2, 6, 4, 3, 9, 10, 12 |
Parcial control | 35% | 2 | 0.08 | 2, 5, 4, 3, 8, 9, 12 |
Report on the results of the laboratory developments | 35% | 2 | 0.08 | 2, 3, 7, 9, 10, 11, 12 |
The material given to the supervised activities is self-explanatory. we will also use training material provided by Renesas on the Synergy platform.
Web resources will be used with to refer current embedded technologies.
To delve into the subject, you can consult the following bibliographic sources:
Example of international competition http://www.innovatefpga.com/portal/
Development framework for the Renesas Synergy plataform and embedded board for code execution.
https://www.renesas.com/us/en/products/microcontrollers-microprocessors/renesas-synergy-platform-mcus