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2021/2022

Embedded Systems Prototyping

Code: 102792 ECTS Credits: 6
Degree Type Year Semester
2502441 Computer Engineering OB 3 2
2502441 Computer Engineering OT 4 2
The proposed teaching and assessment methodology that appear in the guide may be subject to changes as a result of the restrictions to face-to-face class attendance imposed by the health authorities.

Contact

Name:
Mŕrius Montón Macián
Email:
Marius.Monton@uab.cat

Use of Languages

Principal working language:
catalan (cat)
Some groups entirely in English:
No
Some groups entirely in Catalan:
No
Some groups entirely in Spanish:
No

Teachers

Josep Velasco González

Prerequisites

There are no prerequisites for this subject, although it is advisable to have taken Embedded System course. On the other hand, it is necessary to know how to design a digital circuit, hence be familiar with Computer Fundamental course 

Part of the material is common to Processors and Peripherals subject, so it is highly recommended to follow both courses at the same time.

Objectives and Contextualisation

This subject is part of the topic Design of computer system oriented to applications . In this topic we discuss about different technological alternatives for the implementation of those systems, spending an amount of time to FPGA based solutions.

The objectives of the course are:

  • To acquire a global vision of the prototyping process.
  • To know technological alternatives of system prototyping
  • To learn how to implement FSM from graphs
  • To learn how to describe digital circuits using a HDL
  • To use a HDL to prototypeembedded systems on FPGAs.
  • To develop an embedded system prototype using micro-controllers.
  • To learn about Real-time and use RTOS (Real Time Operating Systems) in embedded systems
  • Be able to evaluate the performance of a embedded system
  • To know how to verify an embedded system
  • To know about MPSoC & NoC

Competences

    Computer Engineering
  • Acquire personal work habits.
  • Acquire thinking habits.
  • Capacity to design, develop, evaluate and ensure the accessibility, ergonomics, usability and security of computer systems, services and applications, as well as of the information that they manage.
  • Have the capacity to analyse, evaluate and select the most suitable hardware and software platforms to support embedded and real time applications.
  • Have the right personal attitude.
  • Work in teams.

Learning Outcomes

  1. Analyse the requirements of specific and real time computer applications.
  2. Compare and evaluate the possible platforms to fulfil the requirements of embedded and real time applications.
  3. Desenvolupar estratčgies d'aprenentatge autňnom.
  4. Design and develop computer systems that fulfil the specifications of the system and the application, and in particular in reference to embedded and real time systems.
  5. Develop a capacity for analysis, synthesis and prospection.
  6. Develop curiosity and creativity.
  7. Generate proposals that are innovative and competitive.
  8. Select the most suitable platform for an embedded and real time application and design and develop the corresponding solution.
  9. Work cooperatively.
  10. Work independently.

Content

  1. Introduction to embedded system prototyping.
  2. Technological alternatives for system prototyping.
  3. VHDL: synthesis and simulation
  4. VHDL: Implementation of finite state machine 
  5. Prototyping using FPGAs and microcontrolers
  6. Components of embedded systems
  7. Real Time Operating Systems
  8. Cost estimation
  9. Performance evaluation.
  10.  MPSoC and NOC.

 

Methodology

Teaching is structured from the following face-to-face activities: 

- Theory classes, in which an exhibition of the theoretical part of each subject of the program will be made. The typical structure of such a master class will be as follows: first, an introduction will be made in which the objectives of the exhibition and the contents to be discussed are briefly presented. In order to provide the appropriate context, the presentation will refer to the material exhibited in previous classes, so that the position of these contents in the overall framework of the subject is clarified. The subject under study will then be de-developed, including narrative exhibitions, formal developments that provide the theoretical basis, and interspersing examples, illustrating the application of the exhibited content. Important elements will be highlighted so that to be able to distinguish the relevant from the peripheral aspects. Finally, the concepts introduced are summarized and the conclusions drawn.  

- Problem seminars. Most topics are accompanied by a relationship of exercises that students must solve at home. The seminars will review the most critical aspects of understanding and solving problems. Those the teacher considers most interesting or the students find more difficult will be solved and explained on the board 

- Laboratory practices. There will be a subject project that must be developed as a team. A guideline will be available to establish the work that should be done prior to laboratory sessions. The project will be evaluated by team, but also individually, so all members of each team must actively participate in the project.  

All activity support material will be accessible to students so that they can take full advantage of classes and to support individual and group activities performed outside of classroom 

The "learning path", with the description of the activities and the resources necessary to carry them out are available on the UAB Virtual Campus (CV), which will be the usual channel for exchanging information between teachers and students outside the classroom.  

Annotation: Within the schedule set by the centre or degree programme, 15 minutes of one class will be reserved for students to evaluate their lecturers and their courses or modules through questionnaires.

Activities

Title Hours ECTS Learning Outcomes
Type: Directed      
Practical sessions in lab 12 0.48 1, 2, 8
Problems seminar 12 0.48 4, 9, 10
Theoretical lessons 26 1.04 5, 6, 7
Type: Supervised      
Additional problems solving 4 0.16 1, 2, 4, 8
Labs follow up 6 0.24 3, 6, 7, 9, 10
Type: Autonomous      
Estudy 30 1.2 5, 10
Labs preparation 10 0.4 5, 9, 10
Problems resolution 35 1.4 3, 5, 6, 9, 10
Writing reports 10 0.4 6, 7, 9

Assessment

a) Scheduled evaluation processes and activities 

The evaluation of the subject is continuous through written tests, delivery of written works and practical work in mandatory attendance sessions and evaluated in the laboratory. A minimum compliance is established from which the student is able to pass the course. If these minimums are not reached, the subject is suspended. 

The final grade of the course is obtained as follows: 

n = t·50% + p·20% + q·30%,   

Where t is the mark of the two partial examens, p the mark obtained by delivering solutions to the proposed exercises and q the mark from the labs sessions.

t is obtained with the average between the two partial examans. It is necessary to score a minimum of 5/10 in each of the partial exams to pass the subject. If the mark of any partial exam is under 5/10, the result is the lowest of the following values: the corresponding weighted average or 4.5/10. The mark for any of the parial examns can be re-evaluated in the final exam.

b) Scheduling of evaluation activities 

The dates for the continuous evaluation tests of theory, problems or exercises and practical work will be published on the Virtual Campus (CV) and may be subject to possible programming changes for reasons of adaptation to possible incidents: it will always be reported previously through the CV as it is understood to be the usual mechanism for exchanging information between teachers and students outside the classroom. 

c) Re-evaluation process 

It is possible to try to increase the mark for any of the two parts in the final exam independetly.

The proposed exercised that are not delivered has a mark of 0 and can be re-evaluated later.

Lab sessions and their marks cannot be re-evaluated.

d) Qualification review procedure 

For partial exams and for the final second-chance exam, a specific day and time will be set for review of corrections. All other evaluated activities can be reviewed at the teacher's tutoring hours. 

If, as a result of a review, a change on a mark is agreed, that mark cannot be modified again in a later review. 

e) Special grades 

If no delivery is made, no lab session is attended and no exam is taken, the corresponding grade is a "not gradable". In any other case, "not presented" computes as a 0 for the calculation of the weighted average. In other words, participation in an evaluated activity implies that "not presented" activities are considered as zeros. For example, an absence in a lab session involves a zero for that activity. 

Distinction grades shall be awarded to those who obtain a final grade greater than or equal to 9.5/10, up to a 5% of those enrolled in the descending order of the final grade. At the discretion of the teachers’ staff, other cases may alsobe awarded, provided that it does not exceed 5% of the total enrolled students and that the final grade is 9.0/10 or more. 

f) Irregularities committed by the student, copying and plagiarism 

Copies refer to evidence that the work or exam has been carried out in part or in full without the intellectual contribution of the author. This definition also includes proven attempts to copy exams and reports or work deliveries, as well as violations of the standards that guarantee intellectual authorship. Plagiarism refers to the works and texts of other authors that are passed as their own. It is an intellectual property crime. To avoid incurring in plagiarism, the sources used when writing a report should be cited. 

In accordance with UAB regulations, both copies and plagiarism or any attempt to alter the outcome of the evaluation, own or alien – allowing to copy, for example, imply a final score of the corresponding part of 0 and a suspense of the subject in the case of partial exams, final tests or practical work. Evaluation activities qualified in this way and by this procedure will not be recoverable, and therefore the subject is suspended directly without any kind of second chance in the same academic year. 

h) Evaluation of repeat students 

No differentiated treatment has been established for students repeating the subject. 

 

Assessment Activities

Title Weighting Hours ECTS Learning Outcomes
First partial examen 25 2.5 0.1 5, 4, 10
Labs 30 0 0 1, 2, 3, 6, 7, 8, 9, 10
Problems resolution 20 0 0 1, 2, 4, 8
Second partial exam 25 2.5 0.1 5, 4, 10

Bibliography

[1]  James O. Hamblen and Michael D. Furman. (2000). Rapid prototyping of digital systems. Kluwer Academic Publishers.

[2]  LL. Ribas Xirgo. (2011). “Estructura bàsica d’un computador”, Capítol 5 de Montse Peiron Guàrdia, Lluís Ribas i Xirgo, Fermín Sánchez Carracedo i A. Josep Velasco González: Fonaments de computadors. Material docent de la UOC. OpenCourseWare de la UOC. [http://ocw.uoc.edu/informatica-tecnologia-i-multimedia/fonaments-de-computadors/materials/].

[3]  Oliver H. Bailey. (2005). Embedded Systems Desktop Integration. Wordware Publishing.

[4] Peter J. Ashenden. (1998). The student's guide to VHDL. Morgan Kaufmann.

[5] Màrius Montón (2018). Curs de programació de sistemes encastats: El llibre. https://github.com/mariusmm/Llibreencastats

Software

It is planned to use Intel-Altera's Quartus II and Siemens EDA's ModelSim Student Edition to work on VHDL synthesis and simulation. Temporarily, however, there are limitations (in the process of resolving) the use of these tools. 
Alternatively, the tools available online will be used through the website www.edaplayground.com, managed by Doulos.

For the part of programming embedded systems based on microcontrollers, either Freescale CodeWarrior or Simplicity Studio software will be used.